| shape: | DIP |
|---|---|
| Conductive Type: | Standard |
| Integration: | Standard |
| Technics: | Semiconductor IC |
| Application: | Industry |
| Type: | Counter IC/Low Power Schottky |
| Samples: |
|---|
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A series of decoders, multiplexers, and demultiplexers of 74LS series low-power Schottky logic ICs. The 74LS series uses bipolar junction technology, coupled with Schottky diode clips to achieve the same operating speed as the original 74TTL series, but with much lower power consumption.These devices contain three independent 3-input and gates. The SN74LS90N is characterized for operation from 0°C to 70°C.
Each of these monolithic counters contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-five for the LS90N,All of these counters have a gated zero reset and the LS90N also have gated set-to-nine inputs for use in BCD nine's complement applications.To use their maximum count length(decade,divide-by-twelve,or four-bit binary)of these counters ,the CKB input is connected to the Q(A) output . The input count pulses are applied to CKA input and the outputs are as described in the appropriate function table. A symmetrical divide-by-ten count can be obtained from the LS90N counters by connecting the QD output to the CKA input and applying the input count to the CKB input which gives a divide-by-ten square wave at output Q(A).
1.Pin diagram:
2.Logic diagram (Each Flip-Flop):
3.Recommended operating conditions:
4.Electrical characteristics over recommended operating free-air temperature range (unless otherwise noted):
•Low Power Consumption-Typically 45 mW
•High Count Rates-Typically 42 MHz
•Choice of Counting Modes- BCD, Bi-Quinary, Divide-by-Twelve,Binary
•Input Clamp Diodes Limit High Speed Termination Effects
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